An integrated thermopile structure with high responsivity using any standard CMOS process

This paper reports a new thermopile structure using n-poly/p(+)-active layers that are available in any CMOS technology. The thermopile structures are obtained by post-etching of the fabricated and bonded chips. P+-active layers are placed in n-well regions, which are protected from etching by the electrochemical etch-stop technique in a TMAH solution. The n-well regions are then removed using a short EDP etching to reduce the thermal conductivity of the suspended structures, improving the responsivity significantly. The characterization results show that Seebeck coefficients of the n-poly and p(+)-active layers are -320 +/- 15 and 430 +/- 20 mu V K-1, respectively, resulting in a total Seebeck coefficient of 750 +/- 35 mu V K-1. A two-arm bridge thermopile test structure results in a responsivity and a detectivity of 49.8 V W-1 and 5.75 x 10(6) cm Hz(1/2)W(-1), respectively, in vacuum when the n-well is removed. (C) 1998 Elsevier Science S.A. All rights reserved.