The Common Cross-Connected Stage for the 5L ANPC Medium Voltage Multilevel Inverter

被引:45
作者
Chaudhuri, Toufann [1 ]
Rufer, Alfred [2 ]
Steimer, Peter K. [3 ]
机构
[1] ABB Secheron, CH-1217 Geneva, Switzerland
[2] Swiss Fed Inst Technol Lausanne EPFL, Ind Elect Lab, CH-1115 Lausanne, Switzerland
[3] ABB, CH-5300 Turgi, Switzerland
关键词
Cross connected; multilevel; phase capacitors; voltage source inverter; CONVERTERS;
D O I
10.1109/TIE.2009.2033725
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Rising interest in multilevel applications has triggered new research activities. This paper proposes a novel multilevel power electronics building block (PEBB) for the five-level active neutral point clamped (ANPC) multilevel voltage source inverter. The PEBB is composed of six switches in a crossed configuration and one capacitor. It is common to the three phases of a five-level ANPC topology, enabling a large number of levels to be generated. This PEBB is meant to be a reliable upgrade to the 5L topology, increasing output signal quality and reducing the size of the output filter in medium voltage applications. The number of levels generated by the common cross-connected stage ((CS)-S-3) PEBB and the ANPC depends on the voltage ratios chosen between the phase capacitors of the ANPC and the PEBB capacitor(s). The tradeoff stands between the ability to balance the capacitors, the rated blocking voltage of the devices, and the number of levels produced. Under a given configuration, nine levels can be produced, with the possibility to balance the capacitors up to modulation indexes in the region of m = 0.92. The analysis of the general topology, the description of the nine-level case, and simulation results are first presented. Prototyping results are then shown, and they validate the introduced concept and topology.
引用
收藏
页码:2279 / 2286
页数:8
相关论文
共 16 条
[1]  
ALHADIDI HK, 2003, P POW ENG SOC GEN M, V1
[2]  
[Anonymous], 2005, P EUR C POW EL APPL
[3]  
Chaudhuri T., 2008, THESIS
[4]   Cross-connected intermediate level (CCIL) voltage source inverter [J].
Chaudhuri, Toufann ;
Barbosa, Peter ;
Steimer, Peter ;
Rufer, Alfred .
2007 IEEE POWER ELECTRONICS SPECIALISTS CONFERENCE, VOLS 1-6, 2007, :490-496
[5]   The Age of Multilevel Converters Arrives [J].
Franquelo, Leopoldo G. ;
Rodriguez, Jose ;
Leon, Jose I. ;
Kouro, Samir ;
Portillo, Ramon ;
Prats, Maria M. .
IEEE INDUSTRIAL ELECTRONICS MAGAZINE, 2008, 2 (02) :28-39
[6]  
Hammond PW, 1995, RECORD CONF PAP PETR, P231, DOI 10.1109/PCICON.1995.523958
[7]   Hybrid multilevel power conversion system: A competitive solution for high-power applications [J].
Manjrekar, MD ;
Steimer, PK ;
Lipo, TA .
IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, 2000, 36 (03) :834-841
[8]   Diode-clamped multilevel converters: A practicable way to balance DC-link voltages [J].
Marchesoni, M ;
Tenca, P .
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2002, 49 (04) :752-765
[9]  
MARIETHOZ JS, 2005, THESIS EPFL LAUSANNE
[10]  
Meynard T. A., 1992, EPE Journal, V2, P45