WAFER-SCALE INTEGRATION AND 2-LEVEL PIPELINED IMPLEMENTATIONS OF SYSTOLIC ARRAYS

被引:69
作者
KUNG, HT
LAM, MS
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D O I
10.1016/0743-7315(84)90010-8
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
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页码:32 / 63
页数:32
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