BYTE ORGANIZED NMOS-CCD MEMORY WITH DYNAMIC REFRESH LOGIC

被引：5

作者：

VARSHNEY, RC

GUIDRY, MR

AMELIO, GF

EARLY, JM

机构：

[1] FAIRCHILD SEMICONDUCTOR,RES & DEV DIV,CCD SERIAL MEMORY GRP,PALO ALTO,CA 94304

[2] FAIRCHILD CAMERA & INSTR CORP,RES & DEV LAB,PALO ALTO,CA 94304

[3] FAIRCHILD CAMERA & INSTR CORP,RES & DEV DIV,MEMORY & LOGIC GRP,PALO ALTO,CA 94304

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1976年 / 11卷 / 01期

关键词：

D O I：

10.1109/JSSC.1976.1050670

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：18 / 24

页数：7

共 9 条

[1]

AMELIO GF, 1975, MAY NAT COMP C AN

[2] CHARGE COUPLED SEMICONDUCTOR DEVICES [J].

BOYLE, WS ;

SMITH, GE .

BELL SYSTEM TECHNICAL JOURNAL, 1970, 49 (04) :587-+

[3]

CARNES JE, 1972, RCA REV, V33, P607

[4]

KOSONOCKY WF, 1974, WESCON TECH DIG SEP, P211

[5]

MOHSEN AM, 1974, INT ELECTRON DEVICES, P236

[6]

STEIN KU, 1972, FEB ISSCC, P56

[7] SURFACE-CHARGE SHIFT REGISTER WITH DIGITAL REFRESH [J].

TIEMANN, JJ ;

BAERTSCH, RD ;

ENGELER, WE ;

BROWN, DM .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1973, SC 8 (02) :146-151

[8]

TOMPSETT MF, 1972, J SOLID STATE CIR SC, V7, P237

[9]

1975, FAIRCHILD CHARGE COU

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