COLLECTOR EMITTER OFFSET VOLTAGE IN DOUBLE-HETEROJUNCTION BIPOLAR-TRANSISTORS

被引：23

作者：

HAYES, JR ^{[1
]}

GOSSARD, AC ^{[1
]}

WIEGMANN, W ^{[1
]}

机构：

[1] AT&T BELL LABS,MURRAY HILL,NJ 07974

来源：

关键词：

D O I：

10.1049/el:19840521

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：766 / 767

页数：2

共 7 条

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BENEKING, H
SU, LM
[J]. ELECTRONICS LETTERS, 1982, 18 (01) : 25 - 26
[2] DOUBON C, 1983, IEDM TECH DIG, P689
[3] OPTIMUM EMITTER GRADING FOR HETEROJUNCTION BIPOLAR-TRANSISTORS
HAYES, JR
CAPASSO, F
MALIK, RJ
GOSSARD, AC
WIEGMANN, W
[J]. APPLIED PHYSICS LETTERS, 1983, 43 (10) : 949 - 951
[4] KANBE H, 1984, IEEE ELECTR DEVICE L, V5, P172, DOI 10.1109/EDL.1984.25873
[5] HIGH-GAIN AL0.48IN0.52AS/GA0.53AS VERTICAL N-P-N HETEROJUNCTION BIPOLAR-TRANSISTORS GROWN BY MOLECULAR-BEAM EPITAXY
MALIK, RJ
HAYES, JR
CAPASSO, F
ALAVI, K
CHO, AY
[J]. IEEE ELECTRON DEVICE LETTERS, 1983, 4 (10) : 383 - 385
[6] SU LM, 1983, IEEE ELECTRON DEVICE, V4, P130
[7] TABATABAIEALAVI K, 1982, ELECTRON DEVIC LETT, V3, P379