SI/SIGE CMOS POSSIBILITIES

In this paper we discuss the possibilities of using strained Si/SiGe hetero-epitaxy in building complementary metal-oxide-semiconductor (CMOS) devices and circuits. The effect of strain on the band structure is discussed, and the growth of high-quality strained layers is described. Enhanced transport properties of electrons in Si under tensile strain and in SiGe under compressive strain have been observed and will be discussed. An optimized Si/SiGe layer structure for CMOS operation is described and its potential performance is analyzed and compared to a standard Si CMOS. We predict approximately a three-fold reduction in power consumption, 30% increase in speed performance, and 50% increase in packing density.