AN EFFICIENT APPROACH TO GATE MATRIX LAYOUT

被引：14

作者：

HWANG, DK

FUCHS, WK

KANG, SM

机构：

来源：

关键词：

D O I：

10.1109/TCAD.1987.1270323

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

引用

页码：802 / 809

页数：8

共 13 条

[1]

ASANO T, 1982, J DIGITAL SYST, V6, P1

DEO, N ;

KRISHNAMOORTHY, MS ;

LANGSTON, MA .

[3]

Fiduccia CM, 1982, 19TH P DES AUT C, P175, DOI DOI 10.1109/DAC.1982.1585498

[4]

KASHIWABARA T, 1979, MAY IEEE P INT S CIR, P657

[5]

Kernighan B. W., 1970, Bell System Technical Journal, V49, P291

[6]

KRISHNAMURTHY B, 1984, IEEE T COMPUT, V33, P438, DOI 10.1109/TC.1984.1676460

[7]

LEONG HW, 1986, NOV IEEE INT C COMP

[8]

LI JT, 1983, JUL P INT S CIRC SYS, P1013

[9] A DENSE GATE MATRIX LAYOUT METHOD FOR MOS VLSI [J].

LOPEZ, AD ;

LAW, HFS .

[10]

SCHWEIKERT DG, 1972, 9TH P DES AUT WORKSH, P57