AN IMPROVED AUTOMATIC TEST SYSTEM FOR VLSI PARAMETRIC TESTING

[1] CRAWFORD RH, 1967, MOSFET CIRCUIT DESIG

[2] HOWARD JS, 1978, SOLID STATE TECH JUL, P48

[3] KAEMPF U, 1981, SOLID STATE TECH SEP, P81

[4] KHALILY E, 1979, SEL79004 STANF U TEC

[5] SUBTHRESHOLD DESIGN CONSIDERATIONS FOR INSULATED GATE FIELD-EFFECT TRANSISTORS [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1974, SC 9 (02) : 55 - 60

[6] [No title captured]

[1] CRAWFORD RH, 1967, MOSFET CIRCUIT DESIG

[2] HOWARD JS, 1978, SOLID STATE TECH JUL, P48

[3] KAEMPF U, 1981, SOLID STATE TECH SEP, P81

[4] KHALILY E, 1979, SEL79004 STANF U TEC

[5] SUBTHRESHOLD DESIGN CONSIDERATIONS FOR INSULATED GATE FIELD-EFFECT TRANSISTORS [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1974, SC 9 (02) : 55 - 60

[6] [No title captured]