MTD132 - A NEW SUBNANOSECOND MULTI-HIT CMOS TIME-TO-DIGITAL CONVERTER

A new 8 channel, 16 hit, sub-nanosecond resolution, 16 bit dynamic range time-to-digital VLSI CMOS circuit is described. It can operate in either common start or common stop mode and records either leading, trailing, or both input edges. Double pulse resolution is 15 ns. Readout is sparsified, and input signal levels are ECL while control and output levels are CMOS. Measured performance of prototype devices is presented. A CAMAC and a FASTBUS TDC board using this chip are under development.