ANALOG PHASE-MEASURING CIRCUIT FOR DIGITAL CMOS ICS

被引：16

作者：

ROTHERMEL, A ^{[1
]}

DELLOVA, F ^{[1
]}

机构：

[1] THOMSON CONSUMER ELECTR COMPONENTS,F-38240 MEYLAN,FRANCE

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1993年 / 28卷 / 07期

关键词：

D O I：

10.1109/4.222188

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A circuit measuring the phase of incoming asynchronous signals relative to the system clock in digital signal processing is described. The system clock can be in the range from 10 to 20 MHz, as is typical for video signal processing applications. As a reference in the asynchronous signal the positive or negative slope is taken. Its phase is measured with a resolution of 1/32 of a system clock cycle (approximately 1.5 to 3 ns). Pure digital CMOS technology without precision components is used, to enable combined integration on processor chips. Timing precision (jitter) is better than 200 ps without any adjustments. One external capacitor is needed.

引用

页码：853 / 856

页数：4