RAPID ELECTRICAL MEASUREMENTS OF BACK OXIDE AND SILICON FILM THICKNESS IN AN SOI CMOS PROCESS

被引：6

作者：

HAOND, M ^{[1
]}

TACK, M ^{[1
]}

机构：

[1] IMEC,B-3030 LOUVAIN,BELGIUM

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 1991年 / 38卷 / 03期

关键词：

Buried Oxide Thickness - SOI CMOS Process - SOI Transistor - Threshold Voltage Variation;

D O I：

10.1109/16.75181

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We propose to use the front and the back gates of a fully depleted SOI transistor to extract the thickness of both the silicon film and the buried oxide, by plotting the variation of the threshold voltage of the transistor driven by one gate versus the bias on the other gate and vice versa. This allows to derive independently both the silicon film and the buried-oxide thicknesses.

引用

页码：674 / 676

页数：3