A RATIO-INDEPENDENT ALGORITHMIC ANALOG-TO-DIGITAL CONVERTER COMBINING CURRENT MODE AND DYNAMIC TECHNIQUES

被引：42

作者：

NAIRN, DG

SALAMA, CAT

机构：

[1] Department of Electrical Engineering, University of Toronto, Toronto, Ont.

来源：

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS | 1990年 / 37卷 / 03期

基金：

加拿大自然科学与工程研究理事会;

关键词：

D O I：

10.1109/31.52725

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

An algorithmic analog-to-digital converter (ADC) that combines current mode and dynamic techniques is presented. The converter does not rely on high gain amplifiers or well-matched components to achieve high resolution and is inherently insensitive to the amplifier's offset voltage. An analysis of the converter's limitations indicate that the resolution of practical circuits will be limited by the switch induced charge injection. Ultimately though, the kT/C noise leads to an area/resolution tradeoff and the transistor's thermal noise leads to a speed/power tradeoff. A prototype fabricated using a 3-μm CMOS process achieved 10-bit resolution at a sampling rate of 25 kHz using only an area of 0.18 mm2. © 1990 IEEE

引用

页码：319 / 325

页数：7

共 22 条

[1]

ALSTOTT DJ, 1982, IEEE J SOLID STATE C, V17, P1080

[2] AN 8-CHANNEL 8 BIT MICROPROCESSOR COMPATIBLE NMOS D-A CONVERTER WITH PROGRAMMABLE SCALING [J].