A CCD FREQUENCY PRESCALER FOR BROAD-BAND APPLICATIONS

This paper describes a broadband, compact, and power-efficient frequency prescaler based on two-phase CCD's. The CCD frequency prescaler (CCD-FP) is similar in operation to flip-flop based divide-by-N circuits. However, the maximum operating frequency is determined by the charge transit time between CCD electrodes, rather than the propagation delay of a logic gate in which circuit parasitics limit performance. Since parasitic effects are minimized, relatively large gate length CCD electrodes (1 mum) can be used in a millimeter wave device. A prototype CCD-FP has been implemented in a GaAs/AlGaAs modulation-doped CCD (MD-CCD) technology and demonstrated at frequencies up to 18 GHz. At 18.2 GHz the calculated power dissipation is 325 mW. The CCD-FP has a constant input voltage sensitivity as a function of input frequency and the output signal is phase locked to the input. Expansion of the prescaler modulus incurs no penalty in speed of operation and very modest increases in power dissipation, circuit complexity, and chip area. In addition, a novel method of simulating CCD's in SPICE is used extensively for circuit analysis. In conjunction with PISCES two-dimensional transient simulations of the 1-mum MD-CCD, SPICE analysis predicts that an InGaAs-based CCD-FP is capable of operating frequencies approaching 100 GHz. Both the two-dimensional device modeling and the circuit simulations are shown to be in excellent agreement with experimental data in the microwave region.