JOSEPHSON 2-BIT FULL ADDER UTILIZING WIDE MARGIN FUNCTIONAL GATES

被引:6
作者
ICHIMIYA, Y
YAMADA, H
ISHIDA, A
机构
关键词
D O I
10.1109/TMAG.1983.1062329
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
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页码:1178 / 1181
页数:4
相关论文
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