DECODED-SOURCE SENSE AMPLIFIER FOR HIGH-DENSITY DRAMS

被引:3
作者
OKAMURA, JI [1 ]
OKADA, Y [1 ]
KOYANAGI, M [1 ]
TAKEUCHI, Y [1 ]
YAMADA, M [1 ]
SAKURAI, K [1 ]
IMADA, S [1 ]
SAITO, S [1 ]
机构
[1] TOSHIBA MICROELECTR CORP,KAWASAKI 210,JAPAN
关键词
D O I
10.1109/4.50278
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
— A new sense amplifier, called the decoded-source sense amplifier (DSSA), for high-speed, high-density DRAM’s is proposed. To prevent clamping of the common-source node of the sense amplifier caused by bit-line discharge current, the DSSA has an additional latching transistor with a gate controlled by a column decoder. The DSSA has been successfully installed in a 4-Mbit DRAM and provided a RAS access time of 60 ns under a Vccof 4 V at 85°C. © 1990 IEEE
引用
收藏
页码:18 / 23
页数:6
相关论文
共 5 条
[1]  
FUJII S, 1986, IEEE J SOLID STATE C, V22, P643
[2]   HALF-VDD BIT-LINE SENSING SCHEME IN CMOS DRAMS [J].
LU, NCC ;
CHAO, HH .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1984, 19 (04) :451-454
[3]  
NAKAGOMA Y, 1988, IEEE J SOLID STATE C, V23, P1113
[4]  
OKAMURA J, 1989, MAY S VLSI CIRC, P103
[5]  
YOSHIHARA T, 1988, FEB ISSCC DIG TECH P, P238