An architectural approach that decreases the pair on-off time to much less than the individual device recovery time is presented. Two GaAs Fabry-Perot etalons, each having a 30 ns recovery time, were connected in series, defining a logic function with a fast turn-on time and a fast turn-off time. Either of two data pulses, spaced 40 ps apart, was extracted by appropriately delaying a pair of switching pulses spaced 40 ps apart. This approach has application to data generation, multiplexing and demultiplexing, self-routing, and bit permutation.