10K GATE I2L AND 1K COMPONENT ANALOG COMPATIBLE BIPOLAR VLSI TECHNOLOGY - HIT-2

被引：1

作者：

WASHIO, K ^{[1
]}

WATANABE, T ^{[1
]}

OKABE, T ^{[1
]}

HORIE, N ^{[1
]}

机构：

[1] HITACHI LTD,TAKASAKI WORKS,TAKASAKI,GUNMA 37011,JAPAN

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1985年 / 20卷 / 01期

关键词：

D O I：

10.1109/JSSC.1985.1052289

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：157 / 161

页数：5

共 7 条

[1]

HORIE N, 1981, ISSCC, P30

[2]

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[4] SELF-ALIGNED TRANSISTOR WITH SIDEWALL BASE ELECTRODE [J].

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KURE, T ;

OKABE, T ;

NAGATA, M .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1982, 29 (04) :596-600

[5] SUB-NANOSECOND SELF-ALIGNED I2L-MTL CIRCUITS [J].

TANG, DD ;

NING, TH ;

ISAAC, RD ;

FETH, GC ;

WIEDMANN, SK ;

YU, HN .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1980, 27 (08) :1379-1384

[6] PHOSPHORUS BURIED EMITTER I2L FOR HIGH-VOLTAGE OPERATING CIRCUITS [J].

WATANABE, T ;

OKABE, T ;

NAGATA, M .

JAPANESE JOURNAL OF APPLIED PHYSICS, 1977, 16 :143-146

[7]

WATANABE T, 1982, S VLSI, P108

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