DESIGN OF PARASITIC-INSENSITIVE BILINEAR-TRANSFORMED ADMITTANCE-SCALED (BITAS) SC LADDER FILTERS

被引：8

作者：

HOKENEK, E

MOSCHYTZ, GS

机构：

来源：

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS | 1983年 / 30卷 / 12期

关键词：

D O I：

10.1109/TCS.1983.1085320

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：873 / 888

页数：16

共 20 条

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[7] NEW FREQUENCY TRANSFORMATION FOR THE ACCURATE DESIGN OF SC LADDER FILTERS [J].

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HOKENEK E, 1980, P I ELECTR ENG, V127, P21

[9] SWITCHED-CAPACITOR SIMULATION OF GROUNDED INDUCTORS AND GYRATORS [J].

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[10] DESIGN TECHNIQUES FOR MOS SWITCHED CAPACITOR LADDER FILTERS [J].

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