TUTNC: A general purpose parallel computer for neural network computations

被引：7

作者：

Hamalainen, T

Saarinen, J

Kaski, K

机构：

[1] Electronics Laboratory, Tampere University of Technology, FIN-33101 Tampere

来源：

MICROPROCESSORS AND MICROSYSTEMS | 1995年 / 19卷 / 08期

基金：

芬兰科学院;

关键词：

parallel computing; neural networks; tree shape architecture;

D O I：

10.1016/0141-9331(96)82010-2

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper presents the architecture and realization of the TUTNC (Tampere University of Technology Neural Computer) system. TUTNC is designed for parallel computation and it is suitable for several artificial neural network (ANN) algorithms. For parallel processing a MIMD multiprocessor architecture is chosen. Processors are connected via a tree shaped communication network, which can be programmed to perform efficient global operations. The architecture is modular and expandable. The cost of the system is kept low by using commercial DSPs (digital signal processors) and FPGA (field programmable gate array) chips. A small-scale prototype of four processors has been built. Performance is measured using some neural network mappings and estimations are also given for a larger system. Results show that a good cost/performance ratio can be achieved with this architecture.

引用

页码：447 / 465

页数：19