ARCHGEN - AUTOMATED SYNTHESIS OF ANALOG SYSTEMS

被引:42
作者
ANTAO, BAA [1 ]
BRODERSEN, AJ [1 ]
机构
[1] VANDERBILT UNIV, DEPT ELECT ENGN, NASHVILLE, TN 37235 USA
关键词
D O I
10.1109/92.386223
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
High-level design of analog systems is an open area that needs to be addressed with the emerging trend of integrating mixed analog-digital systems. Design methods compatible across the analog-digital boundaries would expedite the design process, and in this paper we address analog high-level design issues. An approach for systems-level synthesis of a class of analog systems is presented. A behavioral level for the analog domain is characterized in terms of state equations and transfer functions in the continuous and discrete domains. State-space representations are generated from transfer function specifications that exhibit system level characteristics such as controllability and observability as well as decoupled and parallel architectures. These state-space representations are synthesized into behavioral-level, technology-independent architectures composed of analog functional components. An intermediate architecture in a circuit implementation technology is synthesized from the behavioral architecture. The various algorithmic procedures for synthesis are implemented in the program ARCHGEN. Behavioral simulation is used for architecture verification and design space exploration.
引用
收藏
页码:231 / 244
页数:14
相关论文
共 24 条
[1]  
[Anonymous], 1984, LINEAR SYSTEM THEORY
[2]  
ANTAO BAA, 1993, THESIS VANDERBILT U
[3]  
ANTAO BAA, 1995, IN PRESS IEEE T VLSI
[4]  
ANTAO BAA, 1992, IEEE DES TEST COMPUT, P8
[5]  
ANTAO BAA, IN PRESS ANALOG INTE
[6]   MIS - A MULTIPLE-LEVEL LOGIC OPTIMIZATION SYSTEM [J].
BRAYTON, RK ;
RUDELL, R ;
SANGIOVANNIVINCENTELLI, A ;
WANG, AR .
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1987, 6 (06) :1062-1081
[7]   MOS SWITCHED-CAPACITOR FILTERS [J].
BRODERSEN, RW ;
GRAY, PR ;
HODGES, DA .
PROCEEDINGS OF THE IEEE, 1979, 67 (01) :61-75
[8]   KOAN ANAGRAM-II - NEW TOOLS FOR DEVICE-LEVEL ANALOG PLACEMENT AND ROUTING [J].
COHN, JM ;
GARROD, DJ ;
RUTENBAR, RA ;
CARLEY, LR .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1991, 26 (03) :330-342
[9]   ALGORITHMS FOR HARDWARE ALLOCATION IN DATA PATH SYNTHESIS [J].
DEVADAS, S ;
NEWTON, AR .
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1989, 8 (07) :768-781
[10]  
ELLIS MA, 1990, ANNOTATED C PLUS PLU