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11-BIT PARITY GENERATOR WITH A SINGLE, VERTICALLY INTEGRATED RESONANT TUNNELLING DEVICE

被引：25
作者：
LAKHANI, AA
POTTER, RC
HIER, HS
机构：
来源：
ELECTRONICS LETTERS | 1988年 / 24卷 / 11期
关键词：
D O I：
10.1049/el:19880461
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
引用
收藏
页码：681 / 683
页数：3
相关论文
共 4 条
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[2]   A PSEUDOMORPHIC IN0.53GA0.47AS ALAS RESONANT TUNNELING BARRIER WITH A PEAK-TO-VALLEY CURRENT RATIO OF 14 AT ROOM-TEMPERATURE [J].
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JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS & EXPRESS LETTERS, 1987, 26 (08) :L1332-L1334
[3]  
Millman J., 1972, INTEGRATED ELECTRONI
[4]   RESONANT TUNNELING DEVICE WITH MULTIPLE NEGATIVE DIFFERENTIAL RESISTANCE - DIGITAL AND SIGNAL-PROCESSING APPLICATIONS WITH REDUCED CIRCUIT COMPLEXITY [J].
SEN, S ;
CAPASSO, F ;
CHO, AY ;
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IEEE TRANSACTIONS ON ELECTRON DEVICES, 1987, 34 (10) :2185-2191
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