EEPROM AS AN ANALOG STORAGE DEVICE, WITH PARTICULAR APPLICATIONS IN NEURAL NETWORKS

The use of EEPROM as a compact, high-precision, nonvolatile, and reconfigurable analog storage element is investigated, with particular consideration of the modifiable weight storage and analog multiplication problems in the hardware implementation of neural network. Industry-standard digital EEPROM cells can be programmed to any analog value of threshold voltage by controlling the voltage and duration of a programming voltage pulse. Even for a well-controlled technology, programming characteristics of different devices on the same chip still vary. The programming window of a single device also narrows with cycling. These phenomena necessitate the use of a feedback-based programming scheme. Stressing at high temperature suggests that charge retention is good even at 175-degrees-C. The linear variation of threshold voltage with temperature implies that temperature compensation of EEPROM is no more complicated than its conventional MOSFET counterpart. An analytical model is developed to explain the behavior of the dc drain current of the EEPROM as a function of the various terminal voltages and the charges stored on the floating gate. The drain current in the saturation region is found to be a quadratic function of drain voltage when the floating-gate-to-drain overlap capacitance is adequately large. A differential circuit that uses this property to generate the multiplication function required of neural net synapses is proposed.