ELECTRON-BEAM LITHOGRAPHY FOR ADVANCED DEVICE PROTOTYPING - PROCESS TOOL METROLOGY

被引:13
作者
ROSENFIELD, MG
THOMSON, MGR
COANE, PJ
KWIETNIAK, KT
KELLER, J
KLAUS, DP
VOLANT, RP
BLAIR, CR
TREMAINE, KS
NEWMAN, TH
HOHN, FJ
机构
来源
JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B | 1993年 / 11卷 / 06期
关键词
D O I
10.1116/1.586636
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Direct write electron-beam lithography is the most flexible technique for sub-0.25 mum imaging in an advanced development environment. The resolution and custom exposure capabilities of electron-beam lithography, as well as the rapid turnaround for new device designs, provide early device/technology feasibility demonstration, learning, and proof-of-concept not easily obtainable with other lithographies. We have used a 50 kV shaped-beam system for advanced complementary metal-oxide-semiconductor (CMOS), bipolar, BiCMOS, and DRAM device prototyping as well as for front-end and back-end process development, metrology standard fabrication, exploratory device fabrication, and x-ray mask fabrication. The high throughput, as compared to vector scan systems, of shaped-beam electron-beam lithography was found to be essential in satisfying the requirements of advanced development programs. The key to success has been a complete understanding and integration of the interaction of the resist process, tool, proximity correction, and metrology at 0.25 mum and below. In this article, we will describe the processes used to obtain minimum dimensions down to 0.1 mum in negative and positive resists with 3sigma linewidth variation typically better than 0.025 mum. Accurate and precise scanning electron microscopy metrology will be shown to be critical for process development and inspection of device wafers. In addition, tool set-up techniques and proximity correction for sub-0.25 mum lithography will be discussed. Working room temperature CMOS devices and circuits, with physical gate widths as small as 0.1 mum, have been fabricated using e-beam lithography for the critical gate level and optical lithography for all other levels. A mixed lithography approach was found to be the most effective use of the e-beam, lithography capabilities.
引用
收藏
页码:2615 / 2620
页数:6
相关论文
共 13 条
[1]  
ASHTON C, 1991, Patent No. 5051598
[2]  
COANE P, IN PRESS P SPIE
[3]   ELECTRON-BEAM LITHOGRAPHY-TOOLS AND APPLICATIONS [J].
HOHN, FJ .
JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS, 1991, 30 (11B) :3088-3092
[4]  
KWIETNIAK K, IN PRESS P SPIE
[5]   EVALUATION AND APPLICATION OF A VERY HIGH-PERFORMANCE CHEMICALLY AMPLIFIED RESIST FOR ELECTRON-BEAM LITHOGRAPHY [J].
LEE, KY ;
HUANG, WS .
JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B, 1993, 11 (06) :2807-2811
[6]  
NEWMAN TH, 1992, MICROLITHOG WORL MAR, V16
[7]   DESIGN AND CHARACTERIZATION OF COMPACT 100 NM-SCALE SILICON METAL-OXIDE SEMICONDUCTOR FIELD-EFFECT TRANSISTORS [J].
REEVES, CM ;
WIND, SJ ;
HOHN, FJ ;
LII, YT ;
BUCCHIGNANO, JJ ;
NEWMAN, TH ;
KLAUS, DP ;
VOLANT, RP ;
KELLER, J ;
TEBIN, B .
JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B, 1992, 10 (06) :2917-2921
[8]   SUBMICRON ELECTRON-BEAM LITHOGRAPHY USING A BEAM SIZE COMPARABLE TO THE LINEWIDTH CONTROL TOLERANCE [J].
ROSENFIELD, MG ;
BUCCHIGNANO, JJ ;
RISHTON, SA ;
KERN, DP ;
KETTELL, LM ;
MOLZEN, WW ;
HOHN, FJ ;
VISWANATHAN, R ;
WARLAUMONT, JM .
JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B, 1987, 5 (01) :114-119
[9]   A STUDY OF PROXIMITY EFFECTS AT HIGH ELECTRON-BEAM VOLTAGES FOR X-RAY MASK FABRICATION .1. ADDITIVE MASK PROCESSES [J].
ROSENFIELD, MG ;
RISHTON, SA ;
KERN, DP ;
SEEGER, DE ;
WHITING, CA .
JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B, 1990, 8 (06) :1763-1770
[10]  
SHAHIDI GG, 1993, UNPUB P S VLSI TECHN, P27