TRAP EFFECTS IN P-CHANNEL GAAS-MESFETS

During liquid-encapsulated Czochralski (LEC) crystal growth, deep-level charge traps are often induced in GaAs starting material to render it "semi-insulating." After processing conventional n-channel GaAs MESFET's, traps in the channel and channel interface regions cause several deleterious parasitic device effects including frequency- and temperature-dependent small-signal conductances, long time constant drain current transients, and sidegating between devices. It has been shown that a p-well GaAs MESFET structure eliminates all of the undesirable parasitic effects in n-channel devices; moreover, complementary p-channel MESFET's are realizable with the same p-well technology. In this paper, the hole capture and emission processes of deep-level traps associated with p-channel GaAs MESFET's are characterized using temperature-dependent drain current transient measurements. The transient behavior is dominated by trapping in the channel-substrate interface region analogous to an n-channel MESFET. By employing a one-level model to extract the activation energy and capture cross section, the traps in the channel-substrate region of the p-channel MESFET are attributed to an EL2 antisite defect (As(Ga)).