Multiprocessor Performance for Real-Time Processing of Video Coding Applications

被引：13

作者：

Jeschke, Hartwig ^{[1
]}

Gaedke, Klaus ^{[1
]}

Pirsch, Peter ^{[1
]}

机构：

[1] Univ Hannover, Informat Technol Lab, D-3000 Hannover 1, Germany

来源：

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY | 1992年 / 2卷 / 02期

关键词：

D O I：

10.1109/76.143421

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This contribution discusses the performance of multiprocessor architectures to be applied for video coding algorithms. SIMD, SIMD cluster, and MIMD architectures re studied by a unified performance approach under specific constraints of video coding algorithms. The proposed performance model considers communication and computation times as well as the required silicon area. MIMD architectures are compared to SIMD with regard to their performance. The optimization of architectural parameters for SIMD and MIMD architectures is discussed. It is shown how the proposed performance model can be applied to the design of VLSI-based multiprocessor systems for video coding.

引用

页码：221 / 230

页数：10

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