Using a CCD/CMOS technology, a fully parallel 4 x 4 focal plane processor, which performs image acquisition, smoothing, and segmentation, has been fabricated and characterized. In this chip, image brightness is converted into signal charge using CCD imaging techniques. The Gaussian smoothing operation is approximated by the repeated application of a simple nearest neighbor binomial convolution mask, realizing the first known use of a true two-dimensional charge division and transfer process. The design allows full control of the spatial extent of the smoothing operation, and incorporates segmentation circuits with global variable threshold control at each pixel location to preserve edges in the image. The processed image is read out using a standard CCD clocking scheme.
