A STATE ASSIGNMENT APPROACH TO ASYNCHRONOUS CMOS CIRCUIT-DESIGN

被引：4

作者：

KANTABUTRA, V ^{[1
]}

ANDREOU, AG ^{[1
]}

机构：

[1] JOHNS HOPKINS UNIV,DEPT ELECT & COMP ENGN,BALTIMORE,MD 21218

来源：

IEEE TRANSACTIONS ON COMPUTERS | 1994年 / 43卷 / 04期

关键词：

Asynchronous circuits;

D O I：

10.1109/12.278483

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

We present a new algorithm for state assignment in asynchronous circuits so that for each circuit state transition, only one (secondary) state variable switches. No intermediate unstable states are used. The resultant circuits operate at optimum speed in terms of the number of transitions made and use only static CMOS gates. By reducing the number of switching events per state transition, noise due to the switching events is reduced and dynamic power dissipation may also be reduced. Our approach is suitable for asynchronous sequential circuits that are designed from flow tables or state transition diagrams. The proposed approach may also be useful for designing synchronous circuits, but explorations into the subject of clock power would be necessary to determine its usefulness.

引用

页码：460 / 469

页数：10