A 1.2-NS HEMT 64-KB SRAM

被引:12
作者
SUZUKI, M
NOTOMI, S
ONO, M
KOBAYASHI, N
MITANI, E
ODANI, K
MIMURA, T
ABE, M
机构
[1] FUJITSU LTD,DIV COMPOUND SEMICOND,COMPOUND LSI DESIGN SECT,NAKAHARU KU,KAWASAKI 211,JAPAN
[2] FUJITSU LABS LTD,COMPOUND SEMICOND DEVICE LAB,ATSUGI 24301,JAPAN
关键词
D O I
10.1109/4.98974
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A 1.2-ns ECL-compatible 64-kb static RAM using 0.60-mu-m-gate high electron mobility transistor (HEMT) technology has been developed. To achieve fast access time, the memory cell array is divided into sixteen 4-kb memory planes and a data-line equalization technique is adopted. The chip power consumption is suppressed to 5.9 W by using three power supply voltages (- 1.0, - 2.0, and - 3.6 V) and a normally-off (E/D) source-follower buffer for the word driver circuit. A new device fabrication technique, called the HEMT double-etch-stop process, enables the RAM to be fabricated in simple and fewer processing steps and reduces the chip dimensions to 7.4 x 6.5 mm.
引用
收藏
页码:1571 / 1576
页数:6
相关论文
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