CORROSION OF PB-50IN FLIP-CHIP INTERCONNECTIONS EXPOSED TO HARSH ENVIRONMENT

被引:6
作者
PUTTLITZ, KJ
机构
[1] IBM Corporation, General Technology Division, Hopewell Junction
来源
IEEE TRANSACTIONS ON COMPONENTS HYBRIDS AND MANUFACTURING TECHNOLOGY | 1990年 / 13卷 / 01期
关键词
D O I
10.1109/33.52869
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
Lead-indium alloys are an alternative to lead-tin solders commonly used for interconnections in the electronics industry. Lead-indium alloys with 25 to 50 wt % In provide a substantially lower process temperature advantage and overall exhibit a much lower tendency to scavenge gold compared to high Pb-Sn solders [8]. However, a corrosion concern has been identified in relation to Pb-In solders, specifically Pb-50In [5], [6], [8]. This alloy is of interest owing to its thermal-fatigue resistance property. Described in this paper are the results and observations of a study conducted to gain a fundamental understanding of the nature and path of corrosion in Pb-50In flip-chip connections exposed to an accelerated hostile-environment test simulating harsh industrial ambients. © 1990 IEEE.
引用
收藏
页码:188 / 193
页数:6
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