RECONCILIATION OF DIFFERENT GATE-VOLTAGE DEPENDENCIES OF 1/F NOISE IN N-MOS AND P-MOS TRANSISTORS

We have examined the 1/f noise of 3 mum x 16 mum, n- and p-MOS transistors as a function of frequency (f), gate-voltage (V(g)), and temperature (T). Measurements were performed for 3 Hz less-than-or-equal-to f less-than-or-equal-to 50 kHz, 100 mV less-than-or-equal-to \V(g) - V(th) \less-than-or-equal-to 4 V, and 77 K less-than-or-equal-to T less-than-or-equal-to 300 K, where V(th) is the threshold voltage. Devices were operated in strong inversion in their linear regimes. At room temperature we find that, for n-MOS transistors, S(V)d is-proportional-to V(d)2/(V(g) - V(th))2, and for p-MOS transistors, we generally find that S(V)d is-proportional-to V(d)2/(V(g) - V(th)), consistent with trends reported by others. At lower temperatures, however, the results can be very different. In fact, we find that the temperature dependence of the noise and the gate-voltage dependence of the noise show similar features, consistent with the idea that the noise at a given T and V(g) is determined by the trap density, D(t)(E), at trap energies E = E(T,V(g)). Both the T- and V(g)-dependencies of the noise imply that D(t)(E) tends to be constant near the silicon conduction band edge, but increases as E approaches the valence band edge. It is evidently these differences in D(t(E) that lead to differences in the gate-voltage dependence of the noise commonly observed at room temperature for n- and p-MOS transistors.