A SUBNANOSECOND CLOCK JOSEPHSON 4-BIT PROCESSOR

被引:11
作者
KOTANI, S
IMAMURA, T
HASUO, S
机构
[1] Fujitsu Ltd, Atsugi
关键词
D O I
10.1109/4.50293
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A Josephson 4-b processor with a 4-b slice microprocessor, a 4-b multiplier, a 12-b accumulator, an 8-kb ROM, and a sequencer is described. The chip was fabricated with 1.5-μm all-niobium technology, and contains 24,000 Nb/AlOx/Nb Josephson junctions. The processor was designed using a bit slice structure and a simple ripple-carry method, and it has a data sequence based on a three-stage pipeline. Experiments confirmed that the processor functions operated correctly. The critical path measurements for each stage show that the ROM has a 100-ps access time, the microprocessor can be clocked at 1.1 GHz, and the multiplier has a 200-ps multiplication time. The power dissipation of the chip was 6.1 mW.
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页码:117 / 124
页数:8
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