IGFET CIRCUIT PERFORMANCE - N-CHANNEL VERSUS P-CHANNEL

被引:5
作者
CHEROFF, G
CRITCHLOW, DL
DENNARD, RH
TERMAN, LM
机构
[1] IBM Components Division, East Fishkill Facility, N. Y. 12533, Hopewell Junction
[2] IBM Watson Research Center, N. Y. 10598, Yorktown Heights
关键词
D O I
10.1109/JSSC.1969.1050014
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The n-channel insulated-gate field-effect transistor offers a factor of 2 to 3.4 mobility advantage (depending on crystal orientation and substrate doping level) over p-channel devices. In addition, several advantages result from the fact that the work function difference between an aluminum gate and the silicon substrate is about —0.8 volt for a p substrate compared with about zero for an n substrate. In particular, this results in a low threshold voltage that allows the use of a substrate bias to adjust the threshold voltage over a useful design range resulting in 1) an added flexibility in choice of thresholds and substrate doping, 2) a reduction in the effect of source-substrate bias on device threshold, 3) decreased junction capacitance, and 4) larger parasitic thick-oxide thresholds for a given insulator thickness. The speed, power, and density advantages of the n-channel device are illustrated for logic and memory circuits using representative n-and p-channel device designs. Copyright © 1969 by The Instrtute of Electrical and Electronics Engineers, Inc.
引用
收藏
页码:267 / +
页数:1
相关论文
共 10 条
[1]  
AGUSTA B, 1969 ISSCC DIGEST TE
[2]   MOBILITY ANISOTROPY AND PIEZORESISTANCE IN SILICON P-TYPE INVERSION LAYERS [J].
COLMAN, D ;
BATE, RT ;
MIZE, JP .
JOURNAL OF APPLIED PHYSICS, 1968, 39 (04) :1923-&
[3]  
CRITCHLOW DL, 1967 MICR S ST LOUIS
[4]  
CRITCHLOW DL, 1968 NEREM REC
[5]   TRANSPORT PROPERTIES OF ELECTRONS IN INVERTED SILICON SURFACES [J].
FANG, FF ;
FOWLER, AB .
PHYSICAL REVIEW, 1968, 169 (03) :619-+
[6]   LOW-POWER BIPOLAR TRANSISTOR MEMORY CELLS [J].
HODGES, DA ;
LEPSELTER, MP ;
LYNES, DJ ;
MACDONALD, RW ;
MACRAE, AU ;
WAGGENER, HA .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1969, SC 4 (05) :280-+
[7]   LARGE-CAPACITY SEMICONDUCTOR MEMORY [J].
HODGES, DA .
PROCEEDINGS OF THE INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS, 1968, 56 (07) :1148-+
[8]  
MURPHY BT, 1968 ISSCC DIGEST TE
[9]  
NIGH HE, 1967, IEEE T ELECTRON DEV, VED14, P631
[10]   AN INVESTIGATION OF POTENTIAL OF MOS TRANSISTOR MEMORIES [J].
PLESHKO, P ;
TERMAN, LM .
IEEE TRANSACTIONS ON ELECTRONIC COMPUTERS, 1966, EC15 (04) :423-+