A 3.3-V 800-NV(RMS) NOISE, GAIN-PROGRAMMABLE CMOS MICROPHONE PREAMPLIFIER DESIGN USING YIELD MODELING TECHNIQUE

A 3.3-V CMOS low-noise gain-programmable microphone preamplifier with a high-impedance balanced input is presented. The preamplifier allows gains from 20 to 35 dB to be set by software control in 1-dB steps with 0.05-dB accuracy. Typical measured V(os) is 0.8 mV, V(os) drift is 1 muV/C, input-referred p-weighted noise is 0.8 muV(rms) and THD is -70 dB. The active area is about 360 mils2 and power consumption is 1.7 mW at 3.3-V supply and 2.9 mW at 5-V supply. These results have been obtained through an intensive use of the yield modeling technique for yield-performance optimization during the design phase, and applying a common-centroid cross-coupled strategy to the layout of all the ideally matched MOS transistors in the input stage.