QUALITY ASSURANCE AND UPGRADE OF ANALOG CHARACTERISTICS BY FAST MISMATCH ANALYSIS OPTION IN NETWORK ANALYSIS ENVIRONMENT

In contrast to digital circuits, the fabrication tolerance of electrical characteristics of analog integrated circuits depends highly on the local device matching accuracy. Especially for scaled structures down to the submicrometer range, the local statistical device parameter mismatching increases rapidly. As in network analysis programs (i.e., SPICE), statistical mismatch effects are not represented within the implemented device modeling; consequently no analysis options are available to compute their influence on electrical circuit characteristics in production. For quality assurance of analog characteristics in fabrication, fast analysis methods have been developed and placed on programs of the SPICE family using MOS mismatch modeling based on experiences reported by Pelgrom et al., Lakshmikumar et al., and own completions in view of connections between local and global process variations. Simulation methods and simulated yield statistics in comparison to measurements of fabricated analog applications are reported. In general, for the development of analog circuitry with regard to yield the given examples demonstrate the fundamental need of having statistical mismatch analysis options within the network analysis environment.