A 64K-FET DYNAMIC RANDOM-ACCESS MEMORY - DESIGN CONSIDERATIONS AND DESCRIPTION

被引：10

作者：

LO, TC

SCHEUERLEIN, RE

TAMLYN, R

机构：

来源：

关键词：

D O I：

10.1147/rd.243.0318

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

引用

页码：318 / 327

页数：10

共 6 条

[1]

Abbas S. A., 1976, 14th Annual Proceedings Reliability Physics, P18, DOI 10.1109/IRPS.1976.362716

[2]

Anolick E. S., 1979, 17th Annual Proceedings Reliability Physics, P8, DOI 10.1109/IRPS.1979.362864

[3] HIGH-SPEED 16-KBIT N-MOS RANDOM-ACCESS MEMORY [J].

ITOH, K ;

SHIMOHIGASHI, K ;

CHIBA, K ;

TANIGUCHI, K ;

KAWAMOTO, H .

[4] INTEGRATED TEST CONCEPT FOR SWITCHED-CAPACITOR DYNAMIC MOS RAMS [J].

LO, TC ;

GUIDRY, MR .

[5] OPTIMIZATION OF LATCHING PULSE FOR DYNAMIC FLIP-FLOP SENSORS [J].

LYNCH, WT ;

BOLL, HJ .

NING, TH ;

COOK, PW ;

DENNARD, RH ;

OSBURN, CM ;

SCHUSTER, SE ;

YU, HN .