A REVIEW OF III-V-SEMICONDUCTOR BASED METAL-INSULATOR-SEMICONDUCTOR STRUCTURES AND DEVICES

Recent breakthroughs in the deposition of multilayer semiconductor/dielectric systems have potentially paved the way for metal insulator-semiconductor (MIS) structures with excellent interface properties to be achieved. In this paper, we review the recent progress in III-V MIS structures and devices. The semiconductors of interest are In0.53Ga0.47As, InP, and GaAs with their excellent electrical properties. These III-V semiconductor based MIS structures have shown steady progress over the past few years, taking advantage of the in situ deposited heteromorphic insulators that led to insulator/III-V compound semiconductor (ICS) interfaces with low interface trap density. Though preliminary in nature, with Si3N4 gate dielectric, minimum interface state densities in the region of low 10(10) eV-1 cm-2 have been obtained in GaAs albeit with some frequency shift and a deep interface trap. The structures in InGaAs have so far shown minimum interface state densities in the low 10(11) eV-1 cm-2 region and very little frequency dispersion. They are void of mid-gap interface traps, and given the recent ongoing developments, it is extremely likely that interface state densities similar to those in GaAs should be possible shortly. Metal-insulator-semiconductor field effect transistors with transconductances of over 200 mS mm-1 have already been fabricated in InGaAs channels. In situ insulator deposition has been demonstrated to be very effective in avoiding interfacial contamination, for example, oxygen, water vapor, and carbon, a scheme deemed extremely pivotal in the eventual realization of high quality ICS interfaces. Apart from technological difficulties in realizing III-V semiconductor MIS devices, interpretation of the electrical properties of ICS interfaces is still not well understood. Also discussed in this paper are the issues involved in characterizing ICS interfaces.