A THEORETICAL-MODEL FOR THE CURRENT VOLTAGE CHARACTERISTICS OF A FLOATING-GATE EEPROM CELL

被引：16

作者：

LIONG, LC

LIU, PC

机构：

[1] Nanyang Technological University, School of Elec trical and Electronic Engineering

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 1993年 / 40卷 / 01期

关键词：

D O I：

10.1109/16.249437

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A model for current-voltage characteristics of an EEPROM cell has been developed and used in simulation of an EEPROM test structure. It provides an explanation for the observed strong drain-induced barrier lowering effect and the role of trapped charge in the floating gate. In this model, the surface potential is related to the terminal voltages through an equivalent electrical circuit. Charge sheet and depletion approximation are used to describe the charge distribution in the semiconductor. Gradual approximation is assumed in deriving the drain current equation. A simplified drain current equation under strong inversion condition is derived. An expression defining the extrapolated threshold voltage is obtained. It is useful in parameters extraction. A new method for extracting the drain coupling ratio and the channel coupling ratio is proposed. Finally, it is shown that extrapolated threshold voltage is a convenient quantity for classifying the threshold voltage of an EEPROM cell.

引用

页码：146 / 151

页数：6

共 11 条

[1]

CHEN CF, 1987, IEEE T ELECTRON DEV, V34, P1540, DOI 10.1109/T-ED.1987.23117

[2] A MILLION-CYCLE CMOS 256K EEPROM [J].