RADIATION FAILURE MODES IN CMOS INTEGRATED-CIRCUITS

被引：13

作者：

BURGHARD, RA ^{[1
]}

GWYN, CW ^{[1
]}

机构：

[1] SANDIA LABS, ALBUQUERQUE, NM 87115 USA

来源：

关键词：

D O I：

10.1109/TNS.1973.4327411

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：300 / 306

页数：7

共 17 条

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[2] BURGHARD RA, TO BE PUBLISHED
[3] FERYSZKA R, RADIATION RESISTANCE
[4] RADIATION-INDUCED INCREASE IN SURFACE RECOMBINATION VELOCITY OF THERMALLY OXIDIZED SILICON STRUCTURES
FITZGERA.DJ
GROVE, AS
[J]. PROCEEDINGS OF THE INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS, 1966, 54 (11): : 1601 - +
[5] LATCH-UP IN CMOS INTEGRATED-CIRCUITS
GREGORY, BL
SHAFER, BD
[J]. IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 1973, NS20 (06) : 293 - 299
[6] MODEL FOR RADIATION-INDUCED CHARGE TRAPPING AND ANNEALING IN OXIDE LAYER OF MOS DEVICES
GWYN, CW
[J]. JOURNAL OF APPLIED PHYSICS, 1969, 40 (12) : 4886 - +
[7] GWYN CW, 1973, SLA730013 SAND DEV R
[8] ROOM-TEMPERATURE ANNEALING OF IONIZATION-INDUCED DAMAGE IN CMOS CIRCUITS
HABING, DH
SHAFER, BD
[J]. IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 1973, NS20 (06) : 307 - 314
[9] HUGHES HL, 1972, IEEE T NUCL SCI, VNS19
[10] KING E, 1972, IEEE T NUCL SCI, VNS19