CONTROL OF SI SOLID-PHASE NUCLEATION BY SURFACE STEPS FOR HIGH-PERFORMANCE THIN-FILM TRANSISTORS

The solid phase nucleation process of amorphous Si(a-Si) deposited by vacuum evaporation on thermally grown SiO2 layers on Si substrates having steps has been investigated. Steps were formed by either isotropic wet chemical etching of the SiO2 layer or anisotropic wet chemical etching of Si(100) followed by thermal oxidation. It has been found that solid phase nucleation is enhanced at the steps and that nucleation sites can be controlled by changing the step shape and a-Si thickness. Grain growth up to about 3 mum from the step edge has been observed. n-channel MOSFET's (metal-oxide-semiconductor field-effect-transistor's) which had steps at the source/drain edge were fabricated. They showed channel electron mobility of about 200 cm2/V.s, which is approximately one order higher than that obtained from MOSFET's fabricated in Si films formed by solid phase crystallization on flat SiO2/Si substrates.