A HIGH-VOLTAGE POLYSILICON TFT WITH MULTIGATE STRUCTURES

被引：10

作者：

UEMOTO, Y

FUJII, E

EMOTO, F

NAKAMURA, A

SENDA, K

机构：

[1] Electronics Research Laboratory, Matsushita Electronics Corporation, Takatsuki

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 1991年 / 38卷 / 01期

关键词：

D O I：

10.1109/16.65741

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We propose a new approach for obtaining a high-voltage thin-film transistor (TFT) with multigate structure where polysilicon TFT's are connected in series. A basic principle for high-voltage operations has been investigated in detail through calculations based on a model describing log IDS- VGS characteristics observed in a single-gate polysilicon TFT. It has been found that off-state (VGS < 0) operation of the polysilicon TFT causes large increase of breakdown voltage of the multigate TFT as a result that a nearly equal fraction of drain voltage is applied across the region around each elemental TFT. The breakdown voltage of drain of the fabricated multigate TFT which has five elemental TFT's has been elevated up to 80 V. © 1991 IEEE

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页码：95 / 100

页数：6

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