A 32-BIT VLSI CPU WITH 15-MIPS PEAK PERFORMANCE

被引：1

作者：

FORSYTH, M

JAFFE, WS

TANKSALVALA, D

WHEELER, J

YETTER, J

机构：

[1] Hewlett-Packard Co, Fort Collins,, CO, USA, Hewlett-Packard Co, Fort Collins, CO, USA

来源：

关键词：

D O I：

10.1109/JSSC.1987.1052812

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：768 / 775

页数：8

共 7 条

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[3]

MAHON MJ, 1986, HEWLETT-PACKARD J, V37, P4

[4] AN NMOS-VLSI PROCESS FOR FABRICATION OF A 32-BIT CPU CHIP [J].

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HALL, LA ;

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SECCOMBE, SD ;

WILSON, MS .

[5] REDUCED INSTRUCTION SET COMPUTERS [J].

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[6]

STALLINGS W, 1986, COMPUTER ORG ARCHITE, P431

[7]

WEISS D, 1987, FEB ISSCC, P230