STATIC FREQUENCY-DIVIDERS FOR HIGH OPERATING SPEED (25 GHZ, 170MW) AND LOW-POWER CONSUMPTION (16 GHZ, 8MW) IN SELECTIVE EPITAXIAL SI BIPOLAR TECHNOLOGY

被引:8
作者
FELDER, A [1 ]
STENGL, R [1 ]
HAUENSCHILD, J [1 ]
REIN, HM [1 ]
MEISTER, TF [1 ]
机构
[1] RUHR UNIV BOCHUM,ARBEITSGRP HALBLEITERBAUELEMENTE,W-4630 BOCHUM,GERMANY
关键词
INTEGRATED CIRCUITS; FREQUENCY DIVIDERS;
D O I
10.1049/el:19930716
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Static frequency dividers have been fabricated in a selective epitaxial bipolar technology using 0.8 mum lithography. The measured maximum frequency of 25 GHz is the highest value reported for static silicon dividers. Moreover, a 16 GHz low-power version is presented which consumes only 8 mW in the first stage.
引用
收藏
页码:1072 / 1074
页数:3
相关论文
共 6 条
[1]   25 GBIT/S DECISION CIRCUIT, 34 GBIT/S MULTIPLEXER, AND 40 GBIT/S DEMULTIPLEXER IC IN SELECTIVE EPITAXIAL SI BIPOLAR TECHNOLOGY [J].
FELDER, A ;
STENGL, R ;
HAUENSCHILD, J ;
REIN, HM ;
MEISTER, TF .
ELECTRONICS LETTERS, 1993, 29 (06) :525-527
[2]  
FELDER A, 1993, FEB IEEE ISSCC 93, P156
[3]  
FELDER A, 1992, OCT P BIP CIRC TECHN, P159
[4]   39.5-GHZ STATIC FREQUENCY-DIVIDER IMPLEMENTED IN ALINAS/GAINAS HBT TECHNOLOGY [J].
HAFIZI, M ;
JENSEN, JF ;
METZGER, RA ;
STANCHINA, WE ;
RENSCH, DB ;
ALLEN, YK .
IEEE ELECTRON DEVICE LETTERS, 1992, 13 (12) :612-614
[5]   A SI BIPOLAR 21-GHZ 320-MW STATIC FREQUENCY-DIVIDER [J].
KURISU, M ;
OHUCHI, M ;
SAWAIRI, A ;
SUGIYAMA, M ;
TAKEMURA, H ;
TASHIRO, T .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1991, 26 (11) :1626-1631
[6]  
MEISTER TF, 1992, P IEDM 92 SAN FRANC, P401