CONDUCTANCE OF MOS TRANSISTORS IN SATURATION

The output conductance of MOS transistors operating in the saturation region is studied theoretically and experimentally. A simple physical model is described which accounts for the modification of the electric field in the drain depletion region near the Si-SiO2 interface, due to the presence of the gate electrode. The saturation conductance is shown on the basis of this model to be a sensitive function of the oxide thickness as well as the substrate impurity concentration. Good agreement is obtained between theory and experiment over a wide range of device parameters. The characteristics of lowly doped very-short-channel devices, which depart from this theory, are also discussed. The departure is shown to be due to a punch-through“-type phenomenon. Copyright © 1969 by The Institute of Electrical and Electronics Engineers, Inc.