N-SOURCE DRAIN COMPENSATION EFFECTS IN SUBMICROMETER LDD MOS DEVICES

被引:7
作者
HAMADA, A
IGURA, Y
IZAWA, R
TAKEDA, E
机构
关键词
D O I
10.1109/EDL.1987.26673
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
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页码:398 / 400
页数:3
相关论文
共 8 条
[1]   DESIGN OF ION-IMPLANTED MOSFETS WITH VERY SMALL PHYSICAL DIMENSIONS [J].
DENNARD, RH ;
GAENSSLEN, FH ;
YU, HN ;
RIDEOUT, VL ;
BASSOUS, E ;
LEBLANC, AR .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1974, SC 9 (05) :256-268
[2]   STRUCTURE-ENHANCED MOSFET DEGRADATION DUE TO HOT-ELECTRON INJECTION [J].
HSU, FC ;
GRINOLDS, HR .
IEEE ELECTRON DEVICE LETTERS, 1984, 5 (03) :71-74
[4]  
Masuda H., 1984, 1984 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No. 84CH1993-5), P1163
[5]  
NG KK, 1986, P VLSI S, P27
[6]   DESIGN AND CHARACTERISTICS OF THE LIGHTLY DOPED DRAIN-SOURCE (LDD) INSULATED GATE FIELD-EFFECT TRANSISTOR [J].
OGURA, S ;
TSANG, PJ ;
WALKER, WW ;
CRITCHLOW, DL ;
SHEPARD, JF .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1980, 27 (08) :1359-1367
[7]  
OGURA S, 1985, IEDM TECH DIG, P718
[8]  
SZE SM, 1981, PHYSICS SEMICONDUCTO