STRESS AND STRESS-RELAXATION IN INTEGRATED-CIRCUIT METALS AND DIELECTRICS

In order to provide data needed in the investigation and modeling of stress voiding in integrated circuit metallizations, stress and stress relaxation in Al/Si/Cu alloys and common dielectrics were studied as a function of storage temperature and deposition conditions. It was found that the room-temperature tensile stress in Al/Si/Cu increases with increasing substrate bias and deposition temperature, and that the isothermal relaxation rate upon cooling from 400-degrees-C is sharply dependent on temperature. The activation energy for the relaxation process was found to be 0.39 eV above 130-degrees-C and about 0.08 eV at lower temperatures. For insulating layers deposited with plasma-enhanced chemical-vapor deposition techniques, strong correlations were found among stress, density, hydrogen content, deposition temperature, and film composition (oxides, nitrides, and several intermediate oxynitrides), with the highest levels of compressive stress (near 1 GPa) being measured in nitride films deposited at 300-degrees-C. These films, as well as phosphorus-doped glasses used as capping/protection layers, were found to undergo structural changes upon post-deposition thermal cycling which affected stress levels.