DIAGNOSIS OF SINGLE-GATE FAILURES IN COMBINATIONAL CIRCUITS

Two procedures are presented for detecting and diagnosing arbitrary single-gate failures in combinational logic circuits. A gate is defined as any multiple-input single-output combinational circuit, and a failure is any detectable transformation of the correct gate function. The testing procedures do not require the construction of a fault table and will locate, to within an equivalence class, the faulty gate and describe its failure. Three test sets of primary input combinations are defined: The detection set, diagnostic set, and complete set. The first procedure uses the detection and diagnostic sets and requires the application of at most K2m+K-1+K-1 primary inputs, where K is the number of gates, each with m inputs. This procedure requires considerable computation for each circuit tested. The second procedure uses the complete set and requires the application of at most (K-1)2m+1 primary inputs, and all computation is done once for each circuit type. The memory required to store the complete set is proportional to K22m. The two procedures are adaptive and not necessarily minimal. Copyright © 1969 by The Institute of Electrical and Electronics Engineers, Inc.