ELECTRICAL TRANSIENT STUDY OF NEGATIVE-RESISTANCE IN SOI MOS-TRANSISTORS

被引：22

作者：

LENEEL, O ^{[1
]}

HAOND, M ^{[1
]}

机构：

[1] CHEMIN VIEUX CHENE,F-38243 MEYLAN,FRANCE

来源：

ELECTRONICS LETTERS | 1990年 / 26卷 / 01期

关键词：

devices; materials; MOS structures; Negative resistance; Semiconductor devices; Transistors;

D O I：

10.1049/el:19900048

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Using electrical transients, we have investigated the negative resistance observed in the output characteristics at high gate voltages in MOS transistors made in SOI films. We show experimentally that this effect is due to a temperature rise in the device itself. This results from the poor thermal conductivity of the buried oxide of the SOI structure. © 1990, The Institution of Electrical Engineers. All rights reserved.

引用

页码：73 / 74

页数：2

共 6 条

[1] CMOS devices and circuits made in lamp-ZMR SOI films
Haond, M.
Dutartre, D.
Bensahel, D.
Monroy-Aguirre, A.
Thouret, S.
Chapuis, D.
[J]. Microelectronic Engineering, 1988, 8 (3-4) : 201 - 218
[2] HAOND M, UNPUB
[3] HAOND M, 1989, 19TH EUR SOL STAT DE
[4] PHYSICAL ORIGIN OF NEGATIVE DIFFERENTIAL RESISTANCE IN SOI TRANSISTORS
MCDAID, LJ
HALL, S
MELLOR, PH
ECCLESTON, W
ALDERMAN, JC
[J]. ELECTRONICS LETTERS, 1989, 25 (13) : 827 - 828
[5] NEGATIVE DYNAMIC RESISTANCE IN MOS DEVICES
SHARMA, D
GAUTIER, J
MERCKEL, G
[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1978, 13 (03) : 378 - 380
[6] SHARMA DK, 1983, IEEE ELECTRON DEV LE, V4, P363

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