A FUNCTIONAL MOS-TRANSISTOR FEATURING GATE-LEVEL WEIGHTED SUM AND THRESHOLD OPERATIONS

被引:375
作者
SHIBATA, T
OHMI, T
机构
[1] Department of Electronic Engineering, Faculty of Engineering, Tohoku University, Aobaku, Sendai
关键词
D O I
10.1109/16.137325
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A new functional MOS transistor has been proposed which works more intelligently than a mere switching device. The functional transistor calculates weighted sum of all input signals at the gate level, and controls the "on" and "off" of the transistor based on the result of such a weighted sum operation. Since the function is quite analogous to that of biological neurons, the device is named a neuron MOSFET or neuMOS (vMOS) in short. The device is composed of a floating gate and multiples of input gates that are capacitively interacting with the floating gate. As the gate-level sum operation is performed in a voltage mode utilizing the capacitive coupling effect, essentially no power dissipation occurs in the calculation, making the device ideal for ULSI implementation. The basic characteristics of neuron MOSFET's as well as of simple circuit blocks are analyzed based on a simple transitor model and experiments. Making use of its very powerful function, a number of interesting circuit applications have been explored. neuMOS inverters and neuron circuits, variable-threshold transistors and inverters, linear resistors, and neuMOS source-follower circuits and single-gate D/A converters are described. The concept of a Soft Hardware Logic Circuit implemented by neuMOS transistors is also proposed. The circuit exhibits a very interesting feature that the logical function of the circuit is arbitrarily altered by external signals without any changes in the hardware configuration.
引用
收藏
页码:1444 / 1455
页数:12
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