RAISED SOURCE DRAIN MOSFET WITH DUAL SIDEWALL SPACERS

A raised source/drain (S/D) MOSFET has been developed with sidewall spacers formed both before and after selective epitaxial silicon deposition in S/D regions. The second spacer overlies any faceted regions of the epitaxial silicon near the gate edge and has advantages for MOSFET's with implant-doped or in-situ doped epitaxial silicon regions. In particular, the spacer can prevent S/D dopants from being implanted through any thinner faceted regions near the gate edge which would otherwise result in a deeper than desired junction depth in the silicon substrate. Additionally, the spacer can prevent source-to-substrate salicide shorts through the thinner faceted regions.