A 0.18-μm CMOS 3.5-Gb/s continuous-time adaptive cable equalizer using enhanced low-frequency gain control method

被引:91
作者
Choi, JS [1 ]
Hwang, MS [1 ]
Jeong, DK [1 ]
机构
[1] Seoul Natl Univ, Sch Elect Engn & Comp Sci, Seoul 151742, South Korea
关键词
adaptation; adaptive equalizer; cable equalizer; common-mode feedback (CMFB); CMOS; enhanced low-frequency gain control; equalizer; gain control; merged path;
D O I
10.1109/JSSC.2003.822774
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper describes a high-speed CMOS adaptive cable equalizer using an enhanced low-frequency gain control method. The additional low-frequency gain control loop enables the use of an open-loop equalizing filter, which alleviates the speed bottleneck of the conventional adaptation method. In addition, combined adaptation of low-frequency gain and high-frequency boosting improves the adaptation accuracy while supporting high-frequency operation. The open-loop equalizing filter incorporates a merged-path topology and offers infinite input impedance, which are suitable for higher frequency operation and cascaded design. This equalizing filter controls its common-mode output voltage level in a feedforward manner, thereby improving bandwidth. A prototype chip was fabricated in 0.18-mum four-metal mixed-mode CMOS technology. The realized active area is 0.48 x 0.73 mm(2). The prototype adaptive equalizer operates up to 3.5 Gb/s over a 15-m RG-58 coaxial cable with 1.8-V supply and dissipates 80 mW. Moreover, the equalizing filter in manual adjustment mode operates up to 5 Gb/s over a 15-m RG-58 coaxial cable.
引用
收藏
页码:419 / 425
页数:7
相关论文
共 16 条
[1]  
Akcasu O. E., 1993, U.S. Patent, Patent No. [5,208,725, 5208725]
[2]   A 3.3V analog adaptive line-equalizer for Fast Ethernet data communication [J].
Babanezhad, JN .
IEEE 1998 CUSTOM INTEGRATED CIRCUITS CONFERENCE - PROCEEDINGS, 1998, :343-346
[3]   An adaptive cable equalizer for serial digital video rates to 400Mb/s [J].
Baker, AJ .
1996 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE, DIGEST OF TECHNICAL PAPERS, 1996, 39 :174-175
[4]   A CMOS 3.5Gbps continuous-time adaptive cable equalizer with joint adaptation method of low-frequency gain and high-frequency boosting [J].
Choi, JS ;
Hwang, MS ;
Jeong, DK .
2003 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS, 2003, :103-106
[5]   Transmitter equalization for 4-Gbps signaling [J].
Dally, WJ ;
Poulton, J .
IEEE MICRO, 1997, 17 (01) :48-56
[6]   A 0.3-μm CMOS 8-Gb/s 4-PAM serial link transceiver [J].
Farjad-Rad, R ;
Yang, CKK ;
Horowitz, MA ;
Lee, TH .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2000, 35 (05) :757-764
[7]   A 0.4-μm CMOS 10-Gb/s 4-PAM pre-emphasis serial link transmitter [J].
Farjad-Rad, R ;
Yang, CKK ;
Horowitz, MA ;
Lee, TH .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1999, 34 (05) :580-585
[8]   A 1.0625Gbps transceiver with 2x-oversampling and transmit signal pre-emphasis [J].
Fiedler, A ;
Mactaggart, R ;
Welch, J ;
Krishnan, S .
1997 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE - DIGEST OF TECHNICAL PAPERS, 1997, 40 :238-239
[9]  
GOTOH K, 1999, IEEE INT SOL STAT CI, P180
[10]  
HARTMAN GP, 1999, P 1999 IEEE INT S CI, P97